1. Field of the Invention
The invention relates to an electronic device and a method for fabricating an electronic device.
2. Description of the Related Prior Art
[1] discloses an electronic device, a so-called flash memory. In such a flash memory, predetermined data can be stored and read out in binary form.
Furthermore, [2] discloses basic principles of so-called carbon nanotubes.
A method for fabricating carbon nanotubes by growing the carbon nanotubes on a substrate is disclosed in [3].
A further fabrication method for fabricating carbon nanotubes by depositing the carbon nanotubes from the vapour phase is described in [3].
Furthermore, [4] discloses a layer system, having a first silicon dioxide layer, a silicon nitride slayer applied thereon, and a second silicon dioxide layer applied on the silicon nitride layer. Such a layer system is also referred to as ONO layer system.
Furthermore, it is described in [4] that the silicon nitride layer has the property analogous to a floating gate, i.e. that charge carriers which have passed through the first silicon dioxide layer or through the second silicon dioxide layer into the silicon nitride layer can be stored there for a very long period of time (a number of years or longer).
Furthermore, [5] discloses forming so-called quantum dots in a layer.
[6] describes a method for storing and reading out binary data in and, respectively, from a flash memory cell. In particular, the functional principle of a NAND read-out is explained.
[7] proposes a device based on nanowires, the nanowires being arranged one above the other such that they cross one another in the device.
The invention is based on the problem of specifying an electronic device and also a method for fabricating an electronic device with which it is possible to form a memory device which, compared with the flash memory disclosed in [1] has a smaller size with the same number of memory cells.
The problem is solved by means of the electronic device and also by means of the method for fabricating an electronic device having the features according to the independent Patent claims.
An electronic device has at least one electrically conductive first nanowire and also a layer system applied on the first nanowire. At least one second nanowire is applied on the layer system, the first nanowire and the second nanowire being arranged skew with respect to one another. The layer system is configured in such a way that charge carriers generated by the first nanowire and/or the second nanowire can be stored in the layer system.
The use of carbon nanotubes, generally nanowires, makes it possible, in a very simple manner, to considerably reduce the size of the electronic memory element formed by the electronic device.
By way of example, if carbon nanotubes having a diameter of one nanometer and a length of 10 m are arranged at a distance of 20 nm from one another, the area which is required for an elementary cell array for storing a bit is reduced by the factor of 500 or more compared with the required area of the flash memory disclosed in [1].
A further considerable advantage of the invention can be seen in the fact that gate electrodes no longer have to be patterned, rather the layers of the layer system can be applied over the whole area. Consequently it is no longer necessary to pattern a floating gate with a very high spatial. resolution of a few nanometers.
The second nanowire may be configured such that it is electrically semiconducting.
The electrical memory element may have both a plurality of electrically conductive first nanowires and a plurality of second nanowires, which are in each case arranged skew with respect to one another.
According to this configuration of the invention, a memory matrix is clearly formed in a corresponding manner to that in the case of the known flash memory.
The second nanowire may be a silicon nanowire or a boron nitride nanowire. In general, the first nanowire and/or the second nanowire may contain, gold, silver, tungsten, copper, tantalum and/or titanium or any desired alloy of a plurality of the abovementioned metals, in general any electrically conductive or semiconducting material. According to a further configuration of the invention, the first nanowire and/or the second nanowire are/is one or a plurality of carbon nanotubes.
Consequently, a nanowire is to be understood hereinafter as a structure which essentially has a thickness approximately equal to the diameter of a carbon nanotube.
The layer system used may be the so-called ONO layer system, i.e. a layer system having a first silicon dioxide layer and a silicon nitride layer applied on the first silicon dioxide layer. A second silicon dioxide layer is applied on the silicon nitride layer.
The ONO layer system clearly forms a floating gate, electrical charge carriers which penetrate through the first silicon dioxide layer or the second silicon dioxide layer being stored in the silicon nitride layer.
In the event of a plurality of first and second nanowires and use of an ONO layer system, one development of the invention provides for the first nanowires and the second nanowires to be arranged in each case in such a way with respect to one another that the distance between two first nanowires or between two second nanowires is in each case at least twice as large as the distance between the second nanowires and the silicon nitride layer in the ONO layer system.
The function of a floating gate can also be realized by quantum dots being formed, in the layer system as artificial imperfections for storing electrical charge carriers. The quantum dots may contain polysilicon.
According to a further configuration of the invention, the first nanowires and/or the second nanowires have a plurality of cylindrical walls arranged concentrically around one another.
This development increases the stability of the nanowires, in particular with regard to a possible reaction with a dielectric possibly situated between the nanowires, as a result of which the reliability of the electronic device is considerably improved.
The invention can clearly be seen in the fact that each second nanowire constitutes a series circuit of transistors in which the first nanowires can clearly be used as gate electrodes. The imperfections which are formed in the layer system for the purpose of storing the charge carriers generated serve for shifting the threshold voltage of the electronic device.
In this way, two mutually differentiable states can be generated in a simple manner by the electronic device according to the invention, as a result of which the electronic device can be used as a binary memory element. These two states are characterized by a first state, in which the threshold voltage of the electronic device is not shifted, and a second state, in which the threshold voltage of the electronic device is shifted.
The functional principle of NAND read-out as described in [6] can be used for storing and for reading out the data. The metallic top electrodes which may be provided on the nanowires are used both for charging the imperfections, i.e. writing at high voltage, and directly during the reading of the data, the regions that are not to be read out being switched through by field effects.
The electronic device presented above can be fabricated by a plurality of electrically conductive first nanowires being arranged next to one another. At least one layer system is applied on the first nanowires. Furthermore, on the layer system, a plurality of second nanowires is arranged next to one another and skew with respect to the first nanowires.
The layer system can, for example, be fabricated by a silicon dioxide layer being applied on the first nanowires, for example by means of a CVD method (chemical vapour deposition method), a sputtering method, or a vapour deposition method. According to this configuration, a silicon nitride layer is applied on the silicon dioxide layer, once again for example by means of a CVD method, a sputtering method, or a vapour deposition method.
A second silicon dioxide layer is applied on the silicon nitride layer, for example in the same way as the first silicon dioxide layer.
In addition, at the beginning of the method, a further silicon nitride layer may be applied on the first nanowires, in particular for the purpose of protecting the nanowires against thermal influences, in particular also against their destruction in the context of a CVD method or of another method in which the nanowires are exposed to an elevated temperature.
The nanowires can be fabricated in various ways, for example by means of a deposition method from the vapour phase (Chemical Vapour Deposition Method, CVD Method), as is described e.g. in [3], or else in the electric arc process or by means of laser ablation.
The nanowires made of a metal can be fabricated by means of known methods, for example by means of a CVD method, a sputtering method or a vapour deposition method.
The nanowires, in particular the carbon nanotubes, can be arranged and oriented in the desired manner for example using one or more electric fields.
As an alternative, their arrangements, or the orientation of the nanowires, can also be effected by mechanical action, for example by shaking or specific arrangement and orientation of the nanowires.
Furthermore, according to an alternative configuration of the invention, so-called nano-pores can be used for arranging the nanowires, in particular for arranging the carbon nanotubes.
As an alternative, just like the arrangement of the second nanotubes, the arrangement of the first nanotubes can be effected in a known manner using a scanning force microscope.
Furthermore, it is possible for a plurality of layer systems to be arranged one above the other in the form of a stack, one or a plurality of first nanowires and one or a plurality of second nanowires being arranged alternately in each case between two layer systems. A further reduction in the requisite space requirement is achieved in this way since clearly in each case only one layer of first nanowires is necessary for controlling layers with second nanowires.
The above-described stacking of the layer systems makes it possible to achieve a further doubling of the storage capacity with the required memory area remaining the same.
Exemplary embodiments of the invention are illustrated in the figures and are explained in more detail below.